Tessolve - senior engineer
CoimbatoreTessolve Semiconductor
...GDSII for complex SoC/ASIC projects.- Perform floorplanning, power planning, placement, clock tree synthesis (CTS), routing, and optimization.- Conduct timing closure using STA tools and methodologies, including multi?corner/multi?mode analysis (MCMM).- Resolve congestion, IR drop, electromigration (EM), and [...]
Category IT & Telecommunications
30 days ago in Hirist