Jobs at Faststream technologies - Cad vapi Jobs in Gujarat, India

Principal physical design engineer -high speed memory interface

RajkotFaststream Technologies

...techniques EDA Tool Experience Cadence Innovus / Synopsys ICC2 Prime Time / Tempus STA IR/EM and power integrity analysis tools Physical verification tools Preferred Experience Experience working on GPU, AI accelerator, HPC, or high-bandwidth compute So Cs Experience with multi-SRAM or memory buffering architectures Exposure to [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Principal rtl integration engineer - high-speed soc \/ chiplets

RajkotFaststream Technologies

...third-party IPs (Synopsys / Cadence / in-house) Handle clocking, reset, power domains, and interconnects Resolve integration issues across RTL, DV, and PD teams Support So C bring-up and debug at RTL and gate level Work with global teams (Europe / US) Must-Have Skills Strong System Verilog / Verilog RTL skills Proven experience [...]

Category IT & Telecommunications

3 days ago in Labor24

Principal physical design engineer -high speed memory interface

JunagadhFaststream Technologies

...techniques EDA Tool Experience Cadence Innovus / Synopsys ICC2 Prime Time / Tempus STA IR/EM and power integrity analysis tools Physical verification tools Preferred Experience Experience working on GPU, AI accelerator, HPC, or high-bandwidth compute So Cs Experience with multi-SRAM or memory buffering architectures Exposure to [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Principal physical design engineer -high speed memory interface

NadiadFaststream Technologies

...techniques EDA Tool Experience Cadence Innovus / Synopsys ICC2 Prime Time / Tempus STA IR/EM and power integrity analysis tools Physical verification tools Preferred Experience Experience working on GPU, AI accelerator, HPC, or high-bandwidth compute So Cs Experience with multi-SRAM or memory buffering architectures Exposure to [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Principal physical design engineer -high speed memory interface

AnandFaststream Technologies

...techniques EDA Tool Experience Cadence Innovus / Synopsys ICC2 Prime Time / Tempus STA IR/EM and power integrity analysis tools Physical verification tools Preferred Experience Experience working on GPU, AI accelerator, HPC, or high-bandwidth compute So Cs Experience with multi-SRAM or memory buffering architectures Exposure to [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Principal rtl integration engineer - high-speed soc \/ chiplets

JamnagarFaststream Technologies

...third-party IPs (Synopsys / Cadence / in-house) Handle clocking, reset, power domains, and interconnects Resolve integration issues across RTL, DV, and PD teams Support So C bring-up and debug at RTL and gate level Work with global teams (Europe / US) Must-Have Skills Strong System Verilog / Verilog RTL skills Proven experience [...]

Category IT & Telecommunications

3 days ago in Labor24

Principal rtl integration engineer - high-speed soc \/ chiplets

VapiFaststream Technologies

...third-party IPs (Synopsys / Cadence / in-house) Handle clocking, reset, power domains, and interconnects Resolve integration issues across RTL, DV, and PD teams Support So C bring-up and debug at RTL and gate level Work with global teams (Europe / US) Must-Have Skills Strong System Verilog / Verilog RTL skills Proven [...]

Category IT & Telecommunications

3 days ago in Labor24

Principal physical design engineer -high speed memory interface

GandhinagarFaststream Technologies

...techniques EDA Tool Experience Cadence Innovus / Synopsys ICC2 Prime Time / Tempus STA IR/EM and power integrity analysis tools Physical verification tools Preferred Experience Experience working on GPU, AI accelerator, HPC, or high-bandwidth compute So Cs Experience with multi-SRAM or memory buffering architectures Exposure to [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Principal rtl integration engineer - high-speed soc \/ chiplets

AnandFaststream Technologies

...third-party IPs (Synopsys / Cadence / in-house) Handle clocking, reset, power domains, and interconnects Resolve integration issues across RTL, DV, and PD teams Support So C bring-up and debug at RTL and gate level Work with global teams (Europe / US) Must-Have Skills Strong System Verilog / Verilog RTL skills Proven experience [...]

Category IT & Telecommunications

3 days ago in Labor24

Principal rtl integration engineer - high-speed soc \/ chiplets

SuratFaststream Technologies

...third-party IPs (Synopsys / Cadence / in-house) Handle clocking, reset, power domains, and interconnects Resolve integration issues across RTL, DV, and PD teams Support So C bring-up and debug at RTL and gate level Work with global teams (Europe / US) Must-Have Skills Strong System Verilog / Verilog RTL skills Proven experience [...]

Category IT & Telecommunications

3 days ago in Labor24

Cad vapi jobs in Gujarat at Faststream technologies 1 -10 of 15 (0.001s)

Principal physical design engineer -high speed memory interface

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal physical design engineer -high speed memory interface

Principal physical design engineer -high speed memory interface

Principal physical design engineer -high speed memory interface

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal physical design engineer -high speed memory interface

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal rtl integration engineer - high-speed soc \/ chiplets

Related Jobs

Cad vapi jobs in Gujarat at Faststream technologies 1 -10 of 15 (0.001s)

Principal physical design engineer -high speed memory interface

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal physical design engineer -high speed memory interface

Principal physical design engineer -high speed memory interface

Principal physical design engineer -high speed memory interface

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal physical design engineer -high speed memory interface

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal rtl integration engineer - high-speed soc \/ chiplets

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