Jobs at Faststream technologies - Architect Jobs in Maharashtra, India

Principal physical design engineer -high speed memory interface

AurangabadFaststream Technologies

...wide data path memory architectures. Key Responsibilities Physical Design & Floorplanning Lead and execute floorplanning for large SRAM-based memory subsystems. Plan and implement ultra-wide high-speed data interfaces (~2 K-bit wide SRAM interfaces). Support integration of large memory arrays consisting of multi-module [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Principal physical design engineer -high speed memory interface

NashikFaststream Technologies

...wide data path memory architectures. Key Responsibilities Physical Design & Floorplanning Lead and execute floorplanning for large SRAM-based memory subsystems. Plan and implement ultra-wide high-speed data interfaces (~2 K-bit wide SRAM interfaces). Support integration of large memory arrays consisting of multi-module [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Principal rtl integration engineer - high-speed soc \/ chiplets

NashikFaststream Technologies

...requires close collaboration with architecture, DV, analog/Ser Des, firmware, and physical design teams in a fast-moving, execution-focused environment. Key Responsibilities Integrate complex RTL subsystems and IPs into So C / chiplet top level Work with high-speed interfaces: PCIe (Gen4/5/6) Ethernet (XXX G / XXX G / XXX G [...]

Category IT & Telecommunications

3 days ago in Labor24

Principal physical design engineer -high speed memory interface

MaharashtraFaststream Technologies

...wide data path memory architectures. Key Responsibilities Physical Design & Floorplanning Lead and execute floorplanning for large SRAM-based memory subsystems. Plan and implement ultra-wide high-speed data interfaces (~2 K-bit wide SRAM interfaces). Support integration of large memory arrays consisting of multi-module [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Principal physical design engineer -high speed memory interface

Navi MumbaiFaststream Technologies

...wide data path memory architectures. Key Responsibilities Physical Design & Floorplanning Lead and execute floorplanning for large SRAM-based memory subsystems. Plan and implement ultra-wide high-speed data interfaces (~2 K-bit wide SRAM interfaces). Support integration of large memory arrays consisting of multi-module [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Principal physical design engineer -high speed memory interface

KolhapurFaststream Technologies

...wide data path memory architectures. Key Responsibilities Physical Design & Floorplanning Lead and execute floorplanning for large SRAM-based memory subsystems. Plan and implement ultra-wide high-speed data interfaces (~2 K-bit wide SRAM interfaces). Support integration of large memory arrays consisting of multi-module [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Principal physical design engineer -high speed memory interface

PuneFaststream Technologies

...wide data path memory architectures. Key Responsibilities Physical Design & Floorplanning Lead and execute floorplanning for large SRAM-based memory subsystems. Plan and implement ultra-wide high-speed data interfaces (~2 K-bit wide SRAM interfaces). Support integration of large memory arrays consisting of multi-module [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Principal rtl integration engineer - high-speed soc \/ chiplets

DombivliFaststream Technologies

...requires close collaboration with architecture, DV, analog/Ser Des, firmware, and physical design teams in a fast-moving, execution-focused environment. Key Responsibilities Integrate complex RTL subsystems and IPs into So C / chiplet top level Work with high-speed interfaces: PCIe (Gen4/5/6) Ethernet (XXX G / XXX G / XXX G [...]

Category IT & Telecommunications

3 days ago in Labor24

Principal rtl integration engineer - high-speed soc \/ chiplets

MaharashtraFaststream Technologies

...requires close collaboration with architecture, DV, analog/Ser Des, firmware, and physical design teams in a fast-moving, execution-focused environment. Key Responsibilities Integrate complex RTL subsystems and IPs into So C / chiplet top level Work with high-speed interfaces: PCIe (Gen4/5/6) Ethernet (XXX G / XXX G / XXX G [...]

Category IT & Telecommunications

3 days ago in Labor24

Principal physical design engineer -high speed memory interface

AmravatiFaststream Technologies

...wide data path memory architectures. Key Responsibilities Physical Design & Floorplanning Lead and execute floorplanning for large SRAM-based memory subsystems. Plan and implement ultra-wide high-speed data interfaces (~2 K-bit wide SRAM interfaces). Support integration of large memory arrays consisting of multi-module [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Architect jobs in Maharashtra at Faststream technologies 1 -10 of 11 (0.003s)

Principal physical design engineer -high speed memory interface

Principal physical design engineer -high speed memory interface

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal physical design engineer -high speed memory interface

Principal physical design engineer -high speed memory interface

Principal physical design engineer -high speed memory interface

Principal physical design engineer -high speed memory interface

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal physical design engineer -high speed memory interface

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Related Jobs

Architect jobs in Maharashtra at Faststream technologies 1 -10 of 11 (0.003s)

Principal physical design engineer -high speed memory interface

Principal physical design engineer -high speed memory interface

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal physical design engineer -high speed memory interface

Principal physical design engineer -high speed memory interface

Principal physical design engineer -high speed memory interface

Principal physical design engineer -high speed memory interface

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal physical design engineer -high speed memory interface

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