Be electronics jobs in Maharashtra at Faststream technologies 1 -8 of 8 (0.001s)

Principal physical design engineer -high speed memory interface

AurangabadFaststream Technologies

...technology nodes (7nm or below) and deep understanding of timing closure challenges associated with wide data path memory architectures. Key Responsibilities Physical Design & Floorplanning Lead and execute floorplanning for large SRAM-based memory subsystems. Plan and implement ultra-wide high-speed data interfaces (~2 [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Principal physical design engineer -high speed memory interface

NashikFaststream Technologies

...technology nodes (7nm or below) and deep understanding of timing closure challenges associated with wide data path memory architectures. Key Responsibilities Physical Design & Floorplanning Lead and execute floorplanning for large SRAM-based memory subsystems. Plan and implement ultra-wide high-speed data interfaces (~2 [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Principal physical design engineer -high speed memory interface

MaharashtraFaststream Technologies

...technology nodes (7nm or below) and deep understanding of timing closure challenges associated with wide data path memory architectures. Key Responsibilities Physical Design & Floorplanning Lead and execute floorplanning for large SRAM-based memory subsystems. Plan and implement ultra-wide high-speed data interfaces (~2 [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Principal physical design engineer -high speed memory interface

Navi MumbaiFaststream Technologies

...technology nodes (7nm or below) and deep understanding of timing closure challenges associated with wide data path memory architectures. Key Responsibilities Physical Design & Floorplanning Lead and execute floorplanning for large SRAM-based memory subsystems. Plan and implement ultra-wide high-speed data interfaces (~2 [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Principal physical design engineer -high speed memory interface

KolhapurFaststream Technologies

...technology nodes (7nm or below) and deep understanding of timing closure challenges associated with wide data path memory architectures. Key Responsibilities Physical Design & Floorplanning Lead and execute floorplanning for large SRAM-based memory subsystems. Plan and implement ultra-wide high-speed data interfaces (~2 [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Principal physical design engineer -high speed memory interface

PuneFaststream Technologies

...technology nodes (7nm or below) and deep understanding of timing closure challenges associated with wide data path memory architectures. Key Responsibilities Physical Design & Floorplanning Lead and execute floorplanning for large SRAM-based memory subsystems. Plan and implement ultra-wide high-speed data interfaces (~2 [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Principal physical design engineer -high speed memory interface

AmravatiFaststream Technologies

...technology nodes (7nm or below) and deep understanding of timing closure challenges associated with wide data path memory architectures. Key Responsibilities Physical Design & Floorplanning Lead and execute floorplanning for large SRAM-based memory subsystems. Plan and implement ultra-wide high-speed data interfaces (~2 [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Principal physical design engineer -high speed memory interface

SangliFaststream Technologies

...technology nodes (7nm or below) and deep understanding of timing closure challenges associated with wide data path memory architectures. Key Responsibilities Physical Design & Floorplanning Lead and execute floorplanning for large SRAM-based memory subsystems. Plan and implement ultra-wide high-speed data interfaces (~2 [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24