Principal electrical engineer (dv)
Karnataka
...(MSEE), or 3+ years (PhD) of relevant industry experience:Expertise in developing testbenches using System Verilog and UVM:Experience using directed and constrained:random test methodologies, coverage closure and gate:level simulations:Strong object:oriented programming knowledge using SystemVerilog:Strong problem:solving and [...]
Category Electronics
3 days ago in TipTopJob