Design verification engineer - system verilog
Bangalore/Hyderabad/Noida/Ahmedabad/PuneSemi leaf
...with debug and waveform analysis tools like Verdi, DVE- Experience writing automation scripts using Python / Perl / TCLGood to Have :- Experience with Gate-Level Simulation (GLS)- Knowledge of UPF and low-power verification- Exposure to SoC-level integration and system validation (ref:hirist.tech) [...]
Category IT & Telecommunications