Tessolve - junior verification engineer - system verilog
BangaloreTessolve Semiconductor
...functional and code coverage metrics- Participate in regression testing and verification sign-off activities- Document verification strategies, test scenarios, and resultsRequired Experience : - 3 to 5 years of hands-on experience in ASIC/SoC design verification- Experience working on block-level and/or subsystem-level [...]
Category IT & Telecommunications
22 days ago in Hirist