Physical design engineer - asic/soc
BangaloreTessolve Semiconductor
...floorplanning, power planning, placement, CTS, routing, and post-route optimization- Drive timing closure using STA methodologies including multi-corner, multi-mode (MCMM) analysis- Analyse and resolve congestion, IR drop, electromigration (EM), and signal integrity issues- Perform and support DRC, LVS, and ERC checks; work [...]
Category Engineering & Architecture