Based bareilly jobs in Andhra Pradesh at Faststream technologies 1 -8 of 8 (0.005s)

Principal physical design engineer -high speed memory interface

AnantapurFaststream Technologies

...read/write optimization for large-scale SRAM-based memory subsystems used in next-generation high-performance compute and accelerator So Cs. This position requires hands-on experience working with advanced technology nodes (7nm or below) and deep understanding of timing closure challenges associated with wide data path memory [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

5 days ago in Labor24

Principal physical design engineer -high speed memory interface

SrikakulamFaststream Technologies

...read/write optimization for large-scale SRAM-based memory subsystems used in next-generation high-performance compute and accelerator So Cs. This position requires hands-on experience working with advanced technology nodes (7nm or below) and deep understanding of timing closure challenges associated with wide data path memory [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

5 days ago in Labor24

Principal physical design engineer -high speed memory interface

HyderabadFaststream Technologies

...read/write optimization for large-scale SRAM-based memory subsystems used in next-generation high-performance compute and accelerator So Cs. This position requires hands-on experience working with advanced technology nodes (7nm or below) and deep understanding of timing closure challenges associated with wide data path memory [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

5 days ago in Labor24

Principal physical design engineer -high speed memory interface

RajahmundryFaststream Technologies

...read/write optimization for large-scale SRAM-based memory subsystems used in next-generation high-performance compute and accelerator So Cs. This position requires hands-on experience working with advanced technology nodes (7nm or below) and deep understanding of timing closure challenges associated with wide data path memory [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

5 days ago in Labor24

Principal physical design engineer -high speed memory interface

KurnoolFaststream Technologies

...read/write optimization for large-scale SRAM-based memory subsystems used in next-generation high-performance compute and accelerator So Cs. This position requires hands-on experience working with advanced technology nodes (7nm or below) and deep understanding of timing closure challenges associated with wide data path memory [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

5 days ago in Labor24

Principal physical design engineer -high speed memory interface

VijayawadaFaststream Technologies

...read/write optimization for large-scale SRAM-based memory subsystems used in next-generation high-performance compute and accelerator So Cs. This position requires hands-on experience working with advanced technology nodes (7nm or below) and deep understanding of timing closure challenges associated with wide data path memory [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

5 days ago in Labor24

Principal physical design engineer -high speed memory interface

KakinadaFaststream Technologies

...read/write optimization for large-scale SRAM-based memory subsystems used in next-generation high-performance compute and accelerator So Cs. This position requires hands-on experience working with advanced technology nodes (7nm or below) and deep understanding of timing closure challenges associated with wide data path memory [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

5 days ago in Labor24

Principal physical design engineer -high speed memory interface

TirupatiFaststream Technologies

...read/write optimization for large-scale SRAM-based memory subsystems used in next-generation high-performance compute and accelerator So Cs. This position requires hands-on experience working with advanced technology nodes (7nm or below) and deep understanding of timing closure challenges associated with wide data path memory [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

5 days ago in Labor24