Staff design verification engineer: ethernet focused
BangaloreTsavorite Scalable Intelligence
...SV/UVM methodology and/or C/C++ based verification with 5yrs+ hands-on experience in IP/sub-system and/or So C level verification Hands on experience and expertise with industry standard verification tools for simulation and debug (Questa/VCS, Visualizer) Experience using random stimulus along with functional coverage and [...]
Category Fashion & Arts