Soc design verification engineer - system verilog/uvm
Bangalore/HyderabadVersatile Club
...validation across complex SoCs.Key Responsibilities :- Perform SoC-level integration verification, preferably for ARM-based SoCs (Cortex-M0+, Cortex-M4, etc.)- Develop and maintain UVM-based verification environments- Implement testbenches, test cases, and verification strategies using SystemVerilog, UVM, C/C++/Assembly- [...]
Category IT & Telecommunications
3 days ago in Hirist