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      Cts vapi jobs in Bangalore 1 -10 of 17 (0.000s)

      Principal engineer - chip design

      BangaloreRecruitSmart

      ...integrity, and other back-end aspects to ensure the successful realization of semiconductor designs. Additionally, you will oversee product support activities for both Pre-production and Post-production stages, ensuring the successful initiation, development, and sustainment of semiconductor designs.Key Responsibilities : - Own [...]

      Category IT & Telecommunications

      6 days ago in Hirist

      Pd lead

      BangaloreMirafra Technologies

      #Physical Design (PD) Lead | 10+ years• End-to-end ownership of physical design from RTL to GDS• Strong expertise in floorplanning, P&R, CTS, timing closure, and signoff• Proven track record of leading teams and delivering on aggressive timelines

      Category Fashion & Arts

      7 days ago in Labor24

      Senior physical design engineer

      BangaloreLeadSoc Technologies Pvt Ltd

      ...routing). Clock Tree Synthesis (CTS): Design and optimize the clock network for minimal skew and latency. Timing Closure: Perform Static Timing Analysis (STA), identify critical paths, and implement design optimization techniques (e.g., buffering, sizing, ECOs) to meet all frequency and timing constraints (setup/hold). Required [...]

      Category IT & Telecommunications

      8 days ago in Labor24

      Physical design engineer - static timing analysis

      Bangalore/Hyderabad/Noida/Ahmedabad/PuneSemi leaf

      ...flow, including floorplanning, placement, CTS, routing, and optimization- Perform block-level timing signoff, ECO generation, and closure- Drive block-level physical and power signoff- Execute and sign off STA, DRC, LVS, IR/EM, and other physical verification checks- Collaborate with cross-functional teams to resolve issues [...]

      Category IT & Telecommunications

      10 days ago in Hirist

      Senior software engineer - android camera & cluster platform

      BangaloreFidelitus HR Labs

      ...stability testing. - Support CTS/VTS compliance, production releases, and post-release issue resolution. - Take ownership of features from concept to production with a strong focus on quality and reliability. Required Skills & Qualifications :- Strong experience with the Android platform using Java and/or Kotlin. - Hands-on [...]

      Category IT & Telecommunications

      10 days ago in Hirist

      Physical design engineer

      Bangalore/HyderabadMaimsD Technology

      ...placement, clock tree synthesis (CTS), routing, and extraction- Perform timing closure across all modes and corners- Handle IR drop, electromigration (EM), power integrity, and signal integrity analysis- Execute physical verification including signoff DRC and LVS closure- Address DFM considerations and ensure signoff-quality [...]

      Category IT & Telecommunications

      11 days ago in Hirist

      Android framework developer - c/c++

      BangaloreTekPillar

      ...and system crashes- Resolve conflicts and apply patches using GIT / Gerrit- Ensure compliance with STS, CTS, GTS, and VTS standards- Work on Binder IPC, Manager Services, and system service integration- Track tasks and issues using JIRARequired Skills : - Strong experience in Android framework development- [...]

      Category IT & Telecommunications

      12 days ago in Hirist

      Senior software engineer - bluetooth

      BangaloreArete Careers OPC Private Limited

      ...good to have- Support CTS/VTS and release readiness.- Knowledge on LE audio is desirable .Required Skills : - Strong Bluetooth Classic & BLE fundamentals.- Hands-on A2DP implementation/debugging.- Android platform or embedded Linux experience.- Solid debugging and ownership mindset. (ref:hirist.tech) [...]

      Category IT & Telecommunications

      13 days ago in Hirist

      Tessolve - physical design team lead - soc/asic

      BangaloreTessolve Semiconductor

      ...tape-outs for cutting-edge semiconductor products.Key Responsibilities : - Lead end-to-end physical design execution for complex SoC/ASIC projects from RTL to GDSII- Drive floorplanning, power planning, placement, CTS, routing, and timing closure activities- Own timing sign-off using MCMM STA [...]

      Category Fashion & Arts

      25 days ago in Hirist

      Physical design engineer - asic/soc

      BangaloreTessolve Semiconductor

      ...floorplanning, power planning, placement, CTS, routing, and post-route optimization- Drive timing closure using STA methodologies including multi-corner, multi-mode (MCMM) analysis- Analyse and resolve congestion, IR drop, electromigration (EM), and signal integrity issues- Perform and support DRC, LVS, and ERC checks; work [...]

      Category Engineering & Architecture

      25 days ago in Hirist
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