Dft lead - asic/soc designs
BangaloreMaimsD Technology
...implementation for IPs and SoCs- Architect and implement DFT features including : 1. JTAG / IEEE 1149.x2. Scan chains and scan compression3. Boundary scan- Lead the complete DFT flow including planning, insertion, verification, and signoff- Implement and validate scan compression techniques to optimize test time and coverage- [...]
Category IT & Telecommunications