Tessolve - senior lead/manager - rtl design engineering
BangaloreTessolve Semiconductor
...timing closure- Perform and guide RTL linting, CDC, and RDC analysis, ensuring clean sign-off using tools such as Synopsys VC SpyGlass- Collaborate with verification, physical design, and system architecture teams to ensure seamless subsystem integration- Review RTL designs and micro-architecture documents to ensure [...]
Category Fashion & Arts