Formal verification engineer - cadence jaspergold
BangaloreMaimsD Technology
...SoC and IP designs.The ideal candidate should be capable of owning formal verification tasks end-to-end and actively collaborating with design, simulation, and architecture teams.Key Responsibilities : - Lead and execute formal verification of complex RTL designs using Cadence JasperGold- Develop and maintain SystemVerilog [...]
Category IT & Telecommunications