Tessolve - physical design team lead - soc/asic
BangaloreTessolve Semiconductor
...EM, and signal integrity checks- Lead design sign-off activities, including DRC, LVS, ERC, and physical verification- Collaborate closely with RTL, synthesis, DFT, verification, CAD, and packaging teams to ensure design quality and alignment- Review constraints, flows, and methodologies to ensure PPA targets are met- Mentor and [...]
Category Fashion & Arts
25 days ago in Hirist