Principal physical design engineer -high speed memory interface
PatnaFaststream Technologies
...Physical Design & Floorplanning Lead and execute floorplanning for large SRAM-based memory subsystems. Plan and implement ultra-wide high-speed data interfaces (~2 K-bit wide SRAM interfaces). Support integration of large memory arrays consisting of multi-module configurations (e.g., XXX memory modules, ~2 MB each). [...]
Category Education, Training, & Library / Sector Graphics, Creativity and Design
4 days ago in Labor24