Tessolve - lead design verification engineer - system verilog
Bangalore/Chennai/HyderabadTessolve Semiconductor
Description : Role Overview :We are looking for an experienced Lead Design Verification Engineer to drive IP and SoC-level verification using industry-standard methodologies and tools. The role requires strong hands-on expertise in SystemVerilog/UVM, protocol verification, coverage closure, and testbench architecture, along with the ability to [...]
Category IT & Telecommunications
30+ days ago in Hirist