Tessolve - senior engineer
CoimbatoreTessolve Semiconductor
...integrity challenges.- Perform DRC/LVS/ERC checks and collaborate with CAD team for ECO and fix strategies.- Work closely with RTL, synthesis, verification, and backend teams to ensure successful tape?out.- Drive performance, area, power (PPA) optimization based on constraints and design goals.- Develop and maintain RTL [...]
Category IT & Telecommunications