Tessolve - senior engineer
CoimbatoreTessolve Semiconductor
...of power analysis, floorplanning, ECO flow, clock tree synthesis, and routing optimization.Key Responsibilities : - Execute physical design implementation flow from RTL to GDSII for complex SoC/ASIC projects.- Perform floorplanning, power planning, placement, clock tree synthesis (CTS), routing, and optimization.- Conduct [...]
Category IT & Telecommunications