Principal physical design engineer -high speed memory interface
JunagadhFaststream Technologies
...optimize floorplan for high throughput data movement. Timing Closure & STA Drive full-chip and block-level timing closure for high-speed memory interfaces. Handle simultaneous Read/Write timing closure requirements across ultra-wide memory datapaths. Perform detailed Static Timing Analysis (STA) including: Multi-mode [...]
Category Education, Training, & Library / Sector Graphics, Creativity and Design
4 days ago in Labor24