Silicon labs - lead rtl design engineer - mixed signal
HyderabadSilabs India Pvt Ltd
...interfaces.- Perform design quality checks including lint, CDC, RDC, and synthesis readiness analyses.- Collaborate with verification engineers to define test plans, drive coverage closure, and debug issues across digital and analog boundaries.- Integrate mixed-signal IPs into SoC top-level RTL and resolve functional or timing [...]
Category Engineering & Architecture