Principal physical design engineer -high speed memory interface
JodhpurFaststream Technologies
...Analysis (STA) including: Multi-mode multi-corner timing closure Setup/Hold closure for high-speed interfaces Cross clock-domain timing analysis Variation and OCV/AOCV/POCV analysis Work closely with architecture and RTL teams to resolve timing bottlenecks. Memory Interface Optimization Implement and optimize high-frequency [...]
Category Education, Training, & Library / Sector Graphics, Creativity and Design
3 days ago in Labor24