Senior staff asic design engineer
BangaloreAxiado Corporation
...understanding of assertions, coverage analysis, RTL synthesis, and timing closure; Should have worked on interface protocols like PCIe, USB, Ethernet, DDR3/4, LPDDR, I2 C/I3 C, SPI, SD/SDIO/e MMC, UART, etc. Experience in design bring up and debug on FPGA based emulation platforms like HAPS, Veloce. Fluency with scripting [...]
Category IT & Telecommunications
10 days ago in Labor24