Lead rtl design engineer
KarnatakaLanceSoft, Inc
...Responsibilities RTL design and micro-architecture development using System Verilog/Verilog Perform Lint, CDC, constraint development , and timing issue resolution Collaborate with verification and physical design teams for full-chip integration Mentor junior engineers and drive design best practices Required Skills Strong [...]
Category Engineering & Architecture / Sector Graphics, Creativity and Design
4 days ago in Labor24