Design verification engineer- display interface protocol specialist
KarnatakaMediaTek
...Create and maintain testbenches using System Verilog and UVM methodology. Perform functional verification of RTL designs, including simulation, debugging, and coverage analysis. Collaborate with designers and other cross-functional teams to understand design specifications and requirements for IP and subsystems. Identify and [...]
Category IT & Telecommunications / Sector Graphics, Creativity and Design
10 days ago in Labor24