Senior staff asic design engineer
BangaloreAxiado Corporation
...Cs. Micro-architecture design, RTL coding, synthesis, timing closure, and documentation of various RTL blocks; Top-level and block-level performance, bandwidth, and power optimization; Work with FPGA engineers to perform early prototyping; and Support test program development, chip validation, and chip life until production [...]
Category IT & Telecommunications
11 days ago in Labor24