Microarchitect & rtl design engineer
KarnatakaBaya Systems
...and low power designs In-depth understanding of on-chip interconnects and No Cs Experience within ARM ACE/CHI or similar coherency protocols Experience designing IP blocks for caches, cache coherency, memory subsystems, interconnects and NOCs Familiarity with RAS designs, Qo S in fabrics, PCIe/IO is a plus Experience with [...]
Category Engineering & Architecture
12 days ago in Labor24