Formal verification engineer - lead
KarnatakaMediaTek
...tools and property specification languages (e. G., SVA, PSL), as well as proficiency in HDLs such as System Verilog, Verilog or VHDL. Experience with industry-standard EDA formal tools. Experience with scripting languages (e. G., Python, Tcl, Perl) and programming languages such as [...]
Category IT & Telecommunications