Fpga verification engineer
BangaloreTonbo Imaging
...via System-Verilog assertions, constrained-random testing, and coverage closure. Analyze simulation failures and debug RTL with tools like Questa Sim/ Model Sim/ Vivado/ Quartus and waveform viewers. Collaborate with RTL designers and systems engineers to understand requirements and corner cases. Participate in code reviews, [...]
Category IT & Telecommunications / Sector IT, Information Technology and Telecommunications
7 days ago in Labor24