Principal physical design engineer -high speed memory interface
ShivamoggaFaststream Technologies
...timing closure, and simultaneous read/write optimization for large-scale SRAM-based memory subsystems used in next-generation high-performance compute and accelerator So Cs. This position requires hands-on experience working with advanced technology nodes (7nm or below) and deep understanding of timing closure [...]
Category Education, Training, & Library / Sector Graphics, Creativity and Design
3 days ago in Labor24