Principal physical design engineer -high speed memory interface
KozhikodeFaststream Technologies
...requirements across ultra-wide memory datapaths. Perform detailed Static Timing Analysis (STA) including: Multi-mode multi-corner timing closure Setup/Hold closure for high-speed interfaces Cross clock-domain timing analysis Variation and OCV/AOCV/POCV analysis Work closely with architecture and RTL teams to resolve timing [...]
Category Education, Training, & Library / Sector Graphics, Creativity and Design
4 days ago in Labor24