Jobs at Faststream technologies - Pr executive Jobs in Kerala, India

Principal physical design engineer -high speed memory interface

KottayamFaststream Technologies

...in advanced nodes (7nm preferred or below) Proven experience handling: High-speed SRAM interfaces Ultra-wide datapath implementations (~2 K width preferred) Large memory macro integration Strong experience in timing closure for high-frequency designs Expertise in simultaneous Read/Write timing [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Principal physical design engineer -high speed memory interface

PalakkadFaststream Technologies

...in advanced nodes (7nm preferred or below) Proven experience handling: High-speed SRAM interfaces Ultra-wide datapath implementations (~2 K width preferred) Large memory macro integration Strong experience in timing closure for high-frequency designs Expertise in simultaneous Read/Write timing [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Principal rtl integration engineer - high-speed soc \/ chiplets

AlappuzhaFaststream Technologies

.../ Verilog RTL skills Proven experience in So C or chiplet RTL integration Solid understanding of: Clock/reset architecture Power domains (UPF/CPF awareness) Interconnects (AXI/No C) Experience integrating high-speed protocol IPs [...]

Category IT & Telecommunications

3 days ago in Labor24

Principal rtl integration engineer - high-speed soc \/ chiplets

KozhikodeFaststream Technologies

.../ Verilog RTL skills Proven experience in So C or chiplet RTL integration Solid understanding of: Clock/reset architecture Power domains (UPF/CPF awareness) Interconnects (AXI/No C) Experience integrating high-speed protocol IPs [...]

Category IT & Telecommunications

3 days ago in Labor24

Principal rtl integration engineer - high-speed soc \/ chiplets

MalappuramFaststream Technologies

.../ Verilog RTL skills Proven experience in So C or chiplet RTL integration Solid understanding of: Clock/reset architecture Power domains (UPF/CPF awareness) Interconnects (AXI/No C) Experience integrating high-speed protocol IPs [...]

Category IT & Telecommunications

3 days ago in Labor24

Principal rtl integration engineer - high-speed soc \/ chiplets

ThiruvananthapuramFaststream Technologies

.../ Verilog RTL skills Proven experience in So C or chiplet RTL integration Solid understanding of: Clock/reset architecture Power domains (UPF/CPF awareness) Interconnects (AXI/No C) Experience integrating high-speed protocol IPs [...]

Category IT & Telecommunications

3 days ago in Labor24

Principal rtl integration engineer - high-speed soc \/ chiplets

ThrissurFaststream Technologies

.../ Verilog RTL skills Proven experience in So C or chiplet RTL integration Solid understanding of: Clock/reset architecture Power domains (UPF/CPF awareness) Interconnects (AXI/No C) Experience integrating high-speed protocol IPs [...]

Category IT & Telecommunications

3 days ago in Labor24

Principal physical design engineer -high speed memory interface

KozhikodeFaststream Technologies

...in advanced nodes (7nm preferred or below) Proven experience handling: High-speed SRAM interfaces Ultra-wide datapath implementations (~2 K width preferred) Large memory macro integration Strong experience in timing closure for high-frequency designs Expertise in simultaneous Read/Write timing [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Principal rtl integration engineer - high-speed soc \/ chiplets

PalakkadFaststream Technologies

.../ Verilog RTL skills Proven experience in So C or chiplet RTL integration Solid understanding of: Clock/reset architecture Power domains (UPF/CPF awareness) Interconnects (AXI/No C) Experience integrating high-speed protocol IPs [...]

Category IT & Telecommunications

3 days ago in Labor24

Principal physical design engineer -high speed memory interface

ThiruvananthapuramFaststream Technologies

...in advanced nodes (7nm preferred or below) Proven experience handling: High-speed SRAM interfaces Ultra-wide datapath implementations (~2 K width preferred) Large memory macro integration Strong experience in timing closure for high-frequency designs Expertise in simultaneous Read/Write timing [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Pr executive jobs in Kerala at Faststream technologies 1 -10 of 12 (0.001s)

Principal physical design engineer -high speed memory interface

Principal physical design engineer -high speed memory interface

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal physical design engineer -high speed memory interface

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal physical design engineer -high speed memory interface

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