Bit jobs in Maharashtra at Faststream technologies 1 -8 of 8 (0.001s)

Principal physical design engineer -high speed memory interface

AurangabadFaststream Technologies

...high-speed data interfaces (~2 K-bit wide SRAM interfaces). Support integration of large memory arrays consisting of multi-module configurations (e.g., XXX memory modules, ~2 MB each). Optimize macro placement, routing channels, and power grid planning for high bandwidth memory blocks. Perform congestion analysis and optimize [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

5 days ago in Labor24

Principal physical design engineer -high speed memory interface

NashikFaststream Technologies

...high-speed data interfaces (~2 K-bit wide SRAM interfaces). Support integration of large memory arrays consisting of multi-module configurations (e.g., XXX memory modules, ~2 MB each). Optimize macro placement, routing channels, and power grid planning for high bandwidth memory blocks. Perform congestion analysis and optimize [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

5 days ago in Labor24

Principal physical design engineer -high speed memory interface

MaharashtraFaststream Technologies

...high-speed data interfaces (~2 K-bit wide SRAM interfaces). Support integration of large memory arrays consisting of multi-module configurations (e.g., XXX memory modules, ~2 MB each). Optimize macro placement, routing channels, and power grid planning for high bandwidth memory blocks. Perform congestion analysis and optimize [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

5 days ago in Labor24

Principal physical design engineer -high speed memory interface

Navi MumbaiFaststream Technologies

...high-speed data interfaces (~2 K-bit wide SRAM interfaces). Support integration of large memory arrays consisting of multi-module configurations (e.g., XXX memory modules, ~2 MB each). Optimize macro placement, routing channels, and power grid planning for high bandwidth memory blocks. Perform congestion analysis and optimize [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

5 days ago in Labor24

Principal physical design engineer -high speed memory interface

KolhapurFaststream Technologies

...high-speed data interfaces (~2 K-bit wide SRAM interfaces). Support integration of large memory arrays consisting of multi-module configurations (e.g., XXX memory modules, ~2 MB each). Optimize macro placement, routing channels, and power grid planning for high bandwidth memory blocks. Perform congestion analysis and optimize [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

5 days ago in Labor24

Principal physical design engineer -high speed memory interface

PuneFaststream Technologies

...high-speed data interfaces (~2 K-bit wide SRAM interfaces). Support integration of large memory arrays consisting of multi-module configurations (e.g., XXX memory modules, ~2 MB each). Optimize macro placement, routing channels, and power grid planning for high bandwidth memory blocks. Perform congestion analysis and optimize [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

5 days ago in Labor24

Principal physical design engineer -high speed memory interface

AmravatiFaststream Technologies

...high-speed data interfaces (~2 K-bit wide SRAM interfaces). Support integration of large memory arrays consisting of multi-module configurations (e.g., XXX memory modules, ~2 MB each). Optimize macro placement, routing channels, and power grid planning for high bandwidth memory blocks. Perform congestion analysis and optimize [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

5 days ago in Labor24

Principal physical design engineer -high speed memory interface

SangliFaststream Technologies

...high-speed data interfaces (~2 K-bit wide SRAM interfaces). Support integration of large memory arrays consisting of multi-module configurations (e.g., XXX memory modules, ~2 MB each). Optimize macro placement, routing channels, and power grid planning for high bandwidth memory blocks. Perform congestion analysis and optimize [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

5 days ago in Labor24