Design engineer vapi jobs in Maharashtra at Faststream technologies 1 -8 of 8 (0.070s)

Principal physical design engineer -high speed memory interface

AurangabadFaststream Technologies

...looking for experienced Physical Design Engineers with strong expertise in high-speed, ultra-wide memory interface implementation. The role involves planning, floorplanning, timing closure, and simultaneous read/write optimization for large-scale SRAM-based memory subsystems used in next-generation high-performance compute and [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

5 days ago in Labor24

Principal physical design engineer -high speed memory interface

NashikFaststream Technologies

...looking for experienced Physical Design Engineers with strong expertise in high-speed, ultra-wide memory interface implementation. The role involves planning, floorplanning, timing closure, and simultaneous read/write optimization for large-scale SRAM-based memory subsystems used in next-generation high-performance compute and [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

5 days ago in Labor24

Principal physical design engineer -high speed memory interface

MaharashtraFaststream Technologies

...looking for experienced Physical Design Engineers with strong expertise in high-speed, ultra-wide memory interface implementation. The role involves planning, floorplanning, timing closure, and simultaneous read/write optimization for large-scale SRAM-based memory subsystems used in next-generation high-performance compute and [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

5 days ago in Labor24

Principal physical design engineer -high speed memory interface

Navi MumbaiFaststream Technologies

...looking for experienced Physical Design Engineers with strong expertise in high-speed, ultra-wide memory interface implementation. The role involves planning, floorplanning, timing closure, and simultaneous read/write optimization for large-scale SRAM-based memory subsystems used in next-generation high-performance compute and [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

5 days ago in Labor24

Principal physical design engineer -high speed memory interface

KolhapurFaststream Technologies

...looking for experienced Physical Design Engineers with strong expertise in high-speed, ultra-wide memory interface implementation. The role involves planning, floorplanning, timing closure, and simultaneous read/write optimization for large-scale SRAM-based memory subsystems used in next-generation high-performance compute and [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

5 days ago in Labor24

Principal physical design engineer -high speed memory interface

PuneFaststream Technologies

...looking for experienced Physical Design Engineers with strong expertise in high-speed, ultra-wide memory interface implementation. The role involves planning, floorplanning, timing closure, and simultaneous read/write optimization for large-scale SRAM-based memory subsystems used in next-generation high-performance compute and [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

5 days ago in Labor24

Principal physical design engineer -high speed memory interface

AmravatiFaststream Technologies

...looking for experienced Physical Design Engineers with strong expertise in high-speed, ultra-wide memory interface implementation. The role involves planning, floorplanning, timing closure, and simultaneous read/write optimization for large-scale SRAM-based memory subsystems used in next-generation high-performance compute and [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

5 days ago in Labor24

Principal physical design engineer -high speed memory interface

SangliFaststream Technologies

...looking for experienced Physical Design Engineers with strong expertise in high-speed, ultra-wide memory interface implementation. The role involves planning, floorplanning, timing closure, and simultaneous read/write optimization for large-scale SRAM-based memory subsystems used in next-generation high-performance compute and [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

5 days ago in Labor24