Design verification engineer - system verilog
Bangalore/Hyderabad/Noida/Ahmedabad/PuneSemi leaf
...Engineer with strong hands-on expertise in System Verilog and UVM methodology.The ideal candidate will have a solid understanding of IP- and SoC-level verification flows and experience working with complex verification environments. Exposure to GLS, UPF, and low-power verification is a plus.Required Skills & Qualifications :- [...]
Category IT & Telecommunications
5 days ago in Hirist