Principal physical design engineer -high speed memory interface
UdaipurFaststream Technologies
...high-speed data interfaces (~2 K-bit wide SRAM interfaces). Support integration of large memory arrays consisting of multi-module configurations (e.g., XXX memory modules, ~2 MB each). Optimize macro placement, routing channels, and power grid planning for high bandwidth memory blocks. Perform congestion analysis and optimize [...]
Category Education, Training, & Library / Sector Graphics, Creativity and Design
5 days ago in Labor24