Ec engineers bareilly jobs in Udaipur at Faststream technologies 1 -2 of 2 (0.001s)

Principal rtl integration engineer - high-speed soc \/ chiplets

UdaipurFaststream Technologies

...requires close collaboration with architecture, DV, analog/Ser Des, firmware, and physical design teams in a fast-moving, execution-focused environment. Key Responsibilities Integrate complex RTL subsystems and IPs into So C / chiplet top level Work with high-speed interfaces: PCIe (Gen4/5/6) Ethernet (XXX G / [...]

Category IT & Telecommunications

8 days ago in Labor24

Principal physical design engineer -high speed memory interface

UdaipurFaststream Technologies

...for experienced Physical Design Engineers with strong expertise in high-speed, ultra-wide memory interface implementation. The role involves planning, floorplanning, timing closure, and simultaneous read/write optimization for large-scale SRAM-based memory subsystems used in next-generation high-performance compute and [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

8 days ago in Labor24

Ec engineers bareilly jobs in Udaipur at Faststream technologies 1 -2 of 2 (0.001s)

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal physical design engineer -high speed memory interface

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