Be electronics bareilly jobs in Uttar Pradesh at Faststream technologies 1 -7 of 7 (0.004s)

Principal physical design engineer -high speed memory interface

KanpurFaststream Technologies

...technology nodes (7nm or below) and deep understanding of timing closure challenges associated with wide data path memory architectures. Key Responsibilities Physical Design & Floorplanning Lead and execute floorplanning for large SRAM-based memory subsystems. Plan and implement ultra-wide high-speed data interfaces (~2 [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

4 days ago in Labor24

Principal physical design engineer -high speed memory interface

GhaziabadFaststream Technologies

...technology nodes (7nm or below) and deep understanding of timing closure challenges associated with wide data path memory architectures. Key Responsibilities Physical Design & Floorplanning Lead and execute floorplanning for large SRAM-based memory subsystems. Plan and implement ultra-wide high-speed data interfaces (~2 [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

4 days ago in Labor24

Principal physical design engineer -high speed memory interface

MeerutFaststream Technologies

...technology nodes (7nm or below) and deep understanding of timing closure challenges associated with wide data path memory architectures. Key Responsibilities Physical Design & Floorplanning Lead and execute floorplanning for large SRAM-based memory subsystems. Plan and implement ultra-wide high-speed data interfaces (~2 [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

4 days ago in Labor24

Principal physical design engineer -high speed memory interface

LucknowFaststream Technologies

...technology nodes (7nm or below) and deep understanding of timing closure challenges associated with wide data path memory architectures. Key Responsibilities Physical Design & Floorplanning Lead and execute floorplanning for large SRAM-based memory subsystems. Plan and implement ultra-wide high-speed data interfaces (~2 [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

4 days ago in Labor24

Principal physical design engineer -high speed memory interface

NoidaFaststream Technologies

...technology nodes (7nm or below) and deep understanding of timing closure challenges associated with wide data path memory architectures. Key Responsibilities Physical Design & Floorplanning Lead and execute floorplanning for large SRAM-based memory subsystems. Plan and implement ultra-wide high-speed data interfaces (~2 [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

4 days ago in Labor24

Principal physical design engineer -high speed memory interface

AgraFaststream Technologies

...technology nodes (7nm or below) and deep understanding of timing closure challenges associated with wide data path memory architectures. Key Responsibilities Physical Design & Floorplanning Lead and execute floorplanning for large SRAM-based memory subsystems. Plan and implement ultra-wide high-speed data interfaces (~2 [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

4 days ago in Labor24

Principal physical design engineer -high speed memory interface

AligarhFaststream Technologies

...technology nodes (7nm or below) and deep understanding of timing closure challenges associated with wide data path memory architectures. Key Responsibilities Physical Design & Floorplanning Lead and execute floorplanning for large SRAM-based memory subsystems. Plan and implement ultra-wide high-speed data interfaces (~2 [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

4 days ago in Labor24