Jobs at Faststream technologies - Support Jobs in Uttar Pradesh, India

Principal rtl integration engineer - high-speed soc \/ chiplets

MoradabadFaststream Technologies

...DV, and PD teams Support So C bring-up and debug at RTL and gate level Work with global teams (Europe / US) Must-Have Skills Strong System Verilog / Verilog RTL skills Proven experience in So C or chiplet RTL integration Solid understanding of: Clock/reset architecture Power domains (UPF/CPF awareness) Interconnects (AXI/No C) [...]

Category IT & Telecommunications

3 days ago in Labor24

Principal rtl integration engineer - high-speed soc \/ chiplets

AgraFaststream Technologies

...DV, and PD teams Support So C bring-up and debug at RTL and gate level Work with global teams (Europe / US) Must-Have Skills Strong System Verilog / Verilog RTL skills Proven experience in So C or chiplet RTL integration Solid understanding of: Clock/reset architecture Power domains (UPF/CPF awareness) Interconnects (AXI/No C) [...]

Category IT & Telecommunications

3 days ago in Labor24

Principal physical design engineer -high speed memory interface

KanpurFaststream Technologies

...K-bit wide SRAM interfaces). Support integration of large memory arrays consisting of multi-module configurations (e.g., XXX memory modules, ~2 MB each). Optimize macro placement, routing channels, and power grid planning for high bandwidth memory blocks. Perform congestion analysis and optimize floorplan for high throughput [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Principal rtl integration engineer - high-speed soc \/ chiplets

MeerutFaststream Technologies

...DV, and PD teams Support So C bring-up and debug at RTL and gate level Work with global teams (Europe / US) Must-Have Skills Strong System Verilog / Verilog RTL skills Proven experience in So C or chiplet RTL integration Solid understanding of: Clock/reset architecture Power domains (UPF/CPF awareness) Interconnects (AXI/No C) [...]

Category IT & Telecommunications

3 days ago in Labor24

Principal physical design engineer -high speed memory interface

GhaziabadFaststream Technologies

...K-bit wide SRAM interfaces). Support integration of large memory arrays consisting of multi-module configurations (e.g., XXX memory modules, ~2 MB each). Optimize macro placement, routing channels, and power grid planning for high bandwidth memory blocks. Perform congestion analysis and optimize floorplan for high throughput [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Principal physical design engineer -high speed memory interface

MeerutFaststream Technologies

...K-bit wide SRAM interfaces). Support integration of large memory arrays consisting of multi-module configurations (e.g., XXX memory modules, ~2 MB each). Optimize macro placement, routing channels, and power grid planning for high bandwidth memory blocks. Perform congestion analysis and optimize floorplan for high throughput [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Principal rtl integration engineer - high-speed soc \/ chiplets

NoidaFaststream Technologies

...DV, and PD teams Support So C bring-up and debug at RTL and gate level Work with global teams (Europe / US) Must-Have Skills Strong System Verilog / Verilog RTL skills Proven experience in So C or chiplet RTL integration Solid understanding of: Clock/reset architecture Power domains (UPF/CPF awareness) Interconnects (AXI/No C) [...]

Category IT & Telecommunications

3 days ago in Labor24

Principal physical design engineer -high speed memory interface

LucknowFaststream Technologies

...K-bit wide SRAM interfaces). Support integration of large memory arrays consisting of multi-module configurations (e.g., XXX memory modules, ~2 MB each). Optimize macro placement, routing channels, and power grid planning for high bandwidth memory blocks. Perform congestion analysis and optimize floorplan for high throughput [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Principal physical design engineer -high speed memory interface

NoidaFaststream Technologies

...K-bit wide SRAM interfaces). Support integration of large memory arrays consisting of multi-module configurations (e.g., XXX memory modules, ~2 MB each). Optimize macro placement, routing channels, and power grid planning for high bandwidth memory blocks. Perform congestion analysis and optimize floorplan for high throughput [...]

Category Education, Training, & Library / Sector Graphics, Creativity and Design

3 days ago in Labor24

Principal rtl integration engineer - high-speed soc \/ chiplets

VaranasiFaststream Technologies

...DV, and PD teams Support So C bring-up and debug at RTL and gate level Work with global teams (Europe / US) Must-Have Skills Strong System Verilog / Verilog RTL skills Proven experience in So C or chiplet RTL integration Solid understanding of: Clock/reset architecture Power domains (UPF/CPF awareness) Interconnects (AXI/No C) [...]

Category IT & Telecommunications

3 days ago in Labor24

Support jobs in Uttar Pradesh at Faststream technologies 1 -10 of 14 (0.006s)

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal physical design engineer -high speed memory interface

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal physical design engineer -high speed memory interface

Principal physical design engineer -high speed memory interface

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal physical design engineer -high speed memory interface

Principal physical design engineer -high speed memory interface

Principal rtl integration engineer - high-speed soc \/ chiplets

Profession

Support jobs in Uttar Pradesh at Faststream technologies 1 -10 of 14 (0.006s)

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal physical design engineer -high speed memory interface

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal physical design engineer -high speed memory interface

Principal physical design engineer -high speed memory interface

Principal rtl integration engineer - high-speed soc \/ chiplets

Principal physical design engineer -high speed memory interface

Principal physical design engineer -high speed memory interface

Principal rtl integration engineer - high-speed soc \/ chiplets

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