Design & verification manager - system verilog
Hyderabad/BangaloreMaimsD Technology
...:The DV Manager will lead end-to-end functional verification for complex IPs and SoCs. This role requires strong technical depth in SystemVerilog/UVM, hands-on verification experience, and proven people leadership. The DV Manager will work closely with Architecture, RTL, Physical Design, DFT, and Program [...]
Category Fashion & Arts