Jobs at Tessolve semiconductor - Cts vapi Jobs in Udupi, India

Principal engineer - chip design

BangaloreAndor Tech Pvt Ltd

...integrity, and other back-end aspects to ensure the successful realization of semiconductor designs. Additionally, you will oversee product support activities for both Pre-production and Post-production stages, ensuring the successful initiation, development, and sustainment of semiconductor designs.Key Responsibilities : [...]

Category IT & Telecommunications

13 hours ago in Hirist

Llm trace analyst - internship

BangaloreQure.ai

About the internship:Review and annotate LLM conversation traces from production healthcare deployments to generate ground-truth labels, evaluate prompt performance, and identify failure patterns to improve model behavior. Selected intern's day-to-day responsibilities include: 1. Review LLM traces and assign accurate ground-truth outputs based on [...]

Category Manufacturing & Production

1 day ago in Internshala

Principal engineer - chip design

BangaloreRecruitSmart

...integrity, and other back-end aspects to ensure the successful realization of semiconductor designs. Additionally, you will oversee product support activities for both Pre-production and Post-production stages, ensuring the successful initiation, development, and sustainment of semiconductor designs.Key Responsibilities : - Own [...]

Category IT & Telecommunications

15 days ago in Hirist

Pd lead

BangaloreMirafra Technologies

#Physical Design (PD) Lead | 10+ years• End-to-end ownership of physical design from RTL to GDS• Strong expertise in floorplanning, P&R, CTS, timing closure, and signoff• Proven track record of leading teams and delivering on aggressive timelines

Category Fashion & Arts

16 days ago in Labor24

Senior physical design engineer

BangaloreLeadSoc Technologies Pvt Ltd

...routing). Clock Tree Synthesis (CTS): Design and optimize the clock network for minimal skew and latency. Timing Closure: Perform Static Timing Analysis (STA), identify critical paths, and implement design optimization techniques (e.g., buffering, sizing, ECOs) to meet all frequency and timing constraints (setup/hold). Required [...]

Category IT & Telecommunications

17 days ago in Labor24

Senior software engineer - android camera & cluster platform

BangaloreFidelitus HR Labs

...stability testing. - Support CTS/VTS compliance, production releases, and post-release issue resolution. - Take ownership of features from concept to production with a strong focus on quality and reliability. Required Skills & Qualifications :- Strong experience with the Android platform using Java and/or Kotlin. - Hands-on [...]

Category IT & Telecommunications

19 days ago in Hirist

Android framework developer - c/c++

BangaloreTekPillar

...and system crashes- Resolve conflicts and apply patches using GIT / Gerrit- Ensure compliance with STS, CTS, GTS, and VTS standards- Work on Binder IPC, Manager Services, and system service integration- Track tasks and issues using JIRARequired Skills : - Strong experience in Android framework development- [...]

Category IT & Telecommunications

21 days ago in Hirist

Senior software engineer - bluetooth

BangaloreArete Careers OPC Private Limited

...good to have- Support CTS/VTS and release readiness.- Knowledge on LE audio is desirable .Required Skills : - Strong Bluetooth Classic & BLE fundamentals.- Hands-on A2DP implementation/debugging.- Android platform or embedded Linux experience.- Solid debugging and ownership mindset. (ref:hirist.tech) [...]

Category IT & Telecommunications

22 days ago in Hirist

Tessolve - physical design team lead - soc/asic

BangaloreTessolve Semiconductor

...tape-outs for cutting-edge semiconductor products.Key Responsibilities : - Lead end-to-end physical design execution for complex SoC/ASIC projects from RTL to GDSII- Drive floorplanning, power planning, placement, CTS, routing, and timing closure activities- Own timing sign-off using MCMM STA [...]

Category Fashion & Arts

30+ days ago in Hirist

Physical design engineer - asic/soc

BangaloreTessolve Semiconductor

...floorplanning, power planning, placement, CTS, routing, and post-route optimization- Drive timing closure using STA methodologies including multi-corner, multi-mode (MCMM) analysis- Analyse and resolve congestion, IR drop, electromigration (EM), and signal integrity issues- Perform and support DRC, LVS, and ERC checks; work [...]

Category Engineering & Architecture

30+ days ago in Hirist

Cts vapi jobs in Udupi at Tessolve semiconductor 1 -10 of 14 (0.000s)

Principal engineer - chip design

Llm trace analyst - internship

Principal engineer - chip design

Pd lead

Senior physical design engineer

Senior software engineer - android camera & cluster platform

Android framework developer - c/c++

Senior software engineer - bluetooth

Tessolve - physical design team lead - soc/asic

Physical design engineer - asic/soc

Related Jobs

Cts vapi jobs in Udupi at Tessolve semiconductor 1 -10 of 14 (0.000s)

Principal engineer - chip design

Llm trace analyst - internship

Principal engineer - chip design

Pd lead

Senior physical design engineer

Senior software engineer - android camera & cluster platform

Android framework developer - c/c++

Senior software engineer - bluetooth

Tessolve - physical design team lead - soc/asic

Physical design engineer - asic/soc

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